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(R)
ICL3224E, ICL3226E, ICL3244E
Data Sheet July 2004 FN4899.4
+/-15kV ESD Protected, +3V to +5.5V, 1Microamp, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown
The Intersil ICL32XXE devices are 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Additionally, they provide 15kV ESD protection (IEC61000-4-2 Air Gap and Human Body Model) on transmitter outputs and receiver inputs (RS-232 pins). Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with manual and enhanced automatic powerdown functions, reduce the standby supply current to a 1A trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This family is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only systems. The ICL3244E is a 3 driver, 5 receiver device that provides a complete serial port suitable for laptop or notebook computers. It also includes a noninverting always-active receiver for "wake-up" capability. These devices, feature an enhanced automatic powerdown function which powers down the on-chip powersupply and driver circuits. This occurs when all receiver and transmitter inputs detect no signal transitions for a period of 30 seconds. These devices power back up, automatically, whenever they sense a transition on any transmitter or receiver input. Table 1 summarizes the features of the devices represented by this data sheet, while Application Note AN9863 summarizes the features of each device comprising the ICL32XXE 3V family.
Features
* Pb-free Available as an Option (see Ordering Information) * ESD Protection for RS-232 I/O Pins to 15kV (IEC61000) * Manual and Enhanced Automatic Powerdown Features * Drop in Replacements for MAX3224E, MAX3226E, MAX3244E * Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V * RS-232 Compatible with VCC = 2.7V * Latch-Up Free * On-Chip Voltage Converters Require Only Four External 0.1F Capacitors * Guaranteed Mouse Driveability (ICL3244E) * "Ready to Transmit" Indicator Output (ICL3224E/26E) * Receiver Hysteresis For Improved Noise Immunity * Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps * Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/s * Wide Power Supply Range . . . . . . . Single +3V to +5.5V * Low Supply Current in Powerdown State. . . . . . . . . . .1A
Applications
* Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks, Palmtops - Modems, Printers and other Peripherals - Digital Cameras - Cellular/Mobile Phones
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)"
TABLE 1. SUMMARY OF FEATURES NO. OF MONITOR Rx. (ROUTB) 0 0 1 DATA RATE (kbps) 250 250 250 MANUAL POWERDOWN? Yes Yes Yes ENHANCED AUTOMATIC POWERDOWN FUNCTION? Yes Yes Yes
PART NUMBER ICL3224E ICL3226E ICL3244E
NO. OF NO. OF Tx. Rx. 2 1 3 2 1 5
Rx. ENABLE FUNCTION? No No No
READY OUTPUT? Yes Yes No
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2000, 2001, 2003, 2004. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ICL3224E, ICL3226E, ICL3244E Ordering Information
PART NO. ICL3224EIA ICL3224EIA-T ICL3226ECA ICL3226ECA-T ICL3244ECA ICL3244ECA-T ICL3244ECAZ (Note) ICL3244ECAZ-T (Note) ICL3244EIA ICL3244EIA-T ICL3244EIB TEMP. RANGE (C) -40 to 85 -40 to 85 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 20 Ld SSOP 20 Ld SSOP Tape and Reel 16 Ld SSOP 16 Ld SSOP Tape and Reel 28 Ld SSOP 28 Ld SSOP Tape and Reel 28 Ld SSOP (Pb-free) 28 Ld SSOP Tape and Reel (Pb-free) 28 Ld SSOP 28 Ld SSOP Tape and Reel 28 Ld SOIC PACKAGE PKG. DWG. # M20.209 M20.209 M16.209 M16.209 M28.209 M28.209 M28.209 M28.209 M28.209 M28.209 M28.3
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Pinouts
ICL3224E (SSOP) TOP VIEW
READY 1 C1+ 2 V+ 3 20 FORCEOFF 19 VCC 18 GND 17 T1OUT 16 R1IN 15 R1OUT 14 FORCEON 13 T1IN 12 T2IN 11 INVALID READY 1 C1+ 2 V+ 3
ICL3226E (SSOP) TOP VIEW
16 FORCEOFF 15 VCC 14 GND 13 T1OUT 12 FORCEON 11 T1IN 10 INVALID 9 R1OUT
C1- 4 C2+ 5 C2- 6 V- 7 T2OUT 8 R2IN 9 R2OUT 10
C1- 4 C2+ 5 C2- 6 V- 7 R1IN 8
ICL3244E (SOIC, SSOP) TOP VIEW
C2+ 1 C2- 2 V3 28 C1+ 27 V+ 26 VCC 25 GND 24 C123 FORCEON 22 FORCEOFF 21 INVALID 20 R2OUTB 19 R1OUT 18 R2OUT 17 R3OUT 16 R4OUT 15 R5OUT
R1IN 4 R2IN 5 R3IN 6 R4IN 7 R5IN 8 T1OUT 9 T2OUT 10 T3OUT 11 T3IN 12 T2IN 13 T1IN 14
2
ICL3224E, ICL3226E, ICL3244E Pin Descriptions
PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT ROUTB INVALID READY System power supply input (3.0V to 5.5V). Internally generated positive transmitter supply (+5.5V). Internally generated negative transmitter supply (-5.5V). Ground connection. External capacitor (voltage doubler) is connected to this lead. External capacitor (voltage doubler) is connected to this lead. External capacitor (voltage inverter) is connected to this lead. External capacitor (voltage inverter) is connected to this lead. TTL/CMOS compatible transmitter Inputs. 15kV ESD Protected, RS-232 level (nominally 5.5V) transmitter outputs. 15kV ESD Protected, RS-232 compatible receiver inputs. TTL/CMOS level receiver outputs. TTL/CMOS level, noninverting, always enabled receiver outputs. Active low output that indicates if no valid RS-232 levels are present on any receiver input. Active high output that indicates when the ICL32XXE is ready to transmit (i.e., V- -4V) FUNCTION
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2). FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
Typical Operating Circuits
ICL3224E
+3.3V + 0.1F 2 + 4 5 + 6 13 C1+ C1C2+ C2T1 T2
19 VCC V+ 3 + C3 0.1F C4 0.1F + T1OUT T2OUT R1IN RS-232 LEVELS
C1 0.1F C2 0.1F
V- 7 17
T1IN T2IN TTL/CMOS LOGIC LEVELS R1OUT
12
8
15 R1 5k
16
R2OUT
10 R2 1 READY 14 FORCEON GND 18 FORCEOFF INVALID 5k
9
R2IN
20 11
VCC TO POWER CONTROL LOGIC
3
ICL3224E, ICL3226E, ICL3244E Typical Operating Circuits
+3.3V +
(Continued) ICL3226E
15
0.1F
C1 0.1F C2 0.1F
C15 C2+ + 6 C211 9 1 READY R1 T1
2 + 4
C1+
VCC
3 V+ V- 7 13 8 5k 16
+ C3 0.1F C4 + 0.1F T1OUT R1IN RS-232 LEVELS
TTL/CMOS LOGIC LEVELS
T1IN R1OUT
FORCEOFF 12 FORCEON GND INVALID 14 10
VCC TO POWER CONTROL LOGIC
ICL3244E
+3.3V + 0.1F 28 + C1+ 26 VCC 27 V+ 3 + C3 0.1F C4 0.1F + T1OUT 13 12 T3IN 20 R2OUTB TTL/CMOS LOGIC LEVELS 19 R1OUT R1 18 R2 17 R3OUT R3 16 R4OUT R4 15 R5OUT 23 R5 FORCEON 5k 5k 8 R5IN 5k 7 R4IN 5k 6 R3IN RS-232 LEVELS 5k 5 R2IN 4 R1IN T2 10 11 T3OUT RS-232 LEVELS
C1 0.1F C2 0.1F
24 C11 C2+ + 2 C214 T1
V-
9
T1IN
T2IN
T2OUT
T3
R2OUT
VCC TO POWER CONTROL LOGIC
22 FORCEOFF 21 INVALID GND 25
4
ICL3224E, ICL3226E, ICL3244E
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, FORCEOFF, FORCEON . . . . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V ROUT, INVALID, READY . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (C/W)
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 140 20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 125 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature (Plastic Package) . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (Lead Tips Only)
Operating Conditions
Temperature Range ICL32XXEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C ICL32XXEI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to 85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25C TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Current, Automatic Powerdown Supply Current, Powerdown Supply Current, Automatic Powerdown Disabled
All RIN Open, FORCEON = GND, FORCEOFF = VCC FORCEOFF = GND All Outputs Unloaded, FORCEON = FORCEOFF = VCC
25
-
1.0
10
A A mA
25 25
-
1.0 0.3
10 1.0
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low Input Logic Threshold High TIN, FORCEON, FORCEOFF TIN, FORCEON, FORCEOFF VCC = 3.3V VCC = 5.0V Transmitter Input Hysteresis Input Leakage Current Output Leakage Current Output Voltage Low Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low VCC = 3.3V VCC = 5.0V Full 25 25 -25 0.6 0.8 1.2 1.5 25 V V V TIN, FORCEON, FORCEOFF FORCEOFF = GND, ICL3244E Only IOUT = 1.6mA IOUT = -1.0mA Full Full Full 25 Full Full Full Full 2.0 2.4 0.5 0.01 0.05 0.8 1.0 10 0.4 V V V V A A V V
VCC -0.6 VCC -0.1
5
ICL3224E, ICL3226E, ICL3244E
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25C (Continued) TEST CONDITIONS VCC = 3.3V VCC = 5.0V Input Hysteresis Input Resistance TRANSMITTER OUTPUTS Output Voltage Swing Output Resistance Output Short-Circuit Current Output Leakage Current VOUT = 12V, VCC = 0V or 3V to 5.5V Automatic Powerdown or FORCEOFF = GND All Transmitter Outputs Loaded with 3k to Ground VCC = V+ = V- = 0V, Transmitter Output = 2V Full Full Full Full 5.0 300 5.4 10M 35 60 25 V mA A TEMP (C) 25 25 25 25 MIN 3 TYP 1.5 1.8 0.5 5 MAX 2.4 2.4 7 UNITS V V V k
PARAMETER Input Threshold High
MOUSE DRIVEABILITY (ICL3244E Only) Transmitter Output Voltage (See Figure 11) T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded with 3k to GND, T1OUT and T2OUT Loaded with 2.5mA Each Full 5 V
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to INVALID High Receiver Input Thresholds to INVALID Low See Figure 6 Full -2.7 2.7 V
See Figure 6
Full
-0.3
-
0.3
V
INVALID, READY Output Voltage IOUT = 1.6mA Low INVALID, READY Output Voltage IOUT = -1.0mA High Receiver Positive or Negative Threshold to INVALID High Delay (tINVH) Receiver Positive or Negative Threshold to INVALID Low Delay (tINVL) Receiver or Transmitter Edge to Note 2 Transmitters Enabled Delay (tWU) Receiver or Transmitter Edge to Transmitters Disabled Delay (tAUTOPWDN) TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay RL = 3k, CL = 1000pF, One Transmitter Switching Receiver Input to Receiver Output, CL = 150pF tPHL tPLH Note 2
Full
-
-
0.4
V
Full
VCC-0.6 -
-
-
V s
25
1
-
25
-
30
-
s
25
-
100
-
s
Full
15
30
60
sec
Full 25 25 25 25 25
250 -
500 0.15 0.15 200 200 100
-
kbps s s ns ns ns
Receiver Output Enable Time Receiver Output Disable Time Transmitter Skew
Normal Operation (ICL3244E Only) Normal Operation (ICL3244E Only) tPHL - tPLH
6
ICL3224E, ICL3226E, ICL3244E
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25C (Continued) TEST CONDITIONS tPHL - tPLH VCC = 3.3V, RL = 3k to 7k, Measured From 3V to -3V or -3V to 3V CL = 150pF to 1000pF CL = 150pF to 2500pF TEMP (C) 25 25 25 MIN 6 4 TYP 50 8 MAX 30 30 UNITS ns V/s V/s
PARAMETER Receiver Skew Transition Region Slew Rate
ESD PERFORMANCE RS-232 Pins (TOUT, RIN) Human Body Model IEC61000-4-2 Contact Discharge IEC61000-4-2 Air Gap Discharge All Other Pins NOTE: 2. An "edge" is defined as a transition through the transmitter or receiver input thresholds. Human Body Model 25 25 25 25 15 8 15 3 kV kV kV kV
Detailed Description
These ICL32XXE interface ICs operate from a single +3V to +5.5V supply, guarantee a 250kbps minimum data rate, require only four small external 0.1F capacitors, feature low power consumption, and meet all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers.
All devices guarantee a 250kbps data rate for full load conditions (3k and 1000pF), VCC 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC 3.3V, RL = 3k, and CL = 250pF, one transmitter easily operates at 1Mbps. Transmitter inputs float if left unconnected, and may cause ICC increases. Connect unused inputs to GND for the best performance.
Charge-Pump
Intersil's new ICL32XXE family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the 10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1F capacitors for the voltage doubler and inverter functions at VCC = 3.3V. See the "Capacitor Selection" section, and Table 3 for capacitor recommendations for other operating conditions. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings.
Receivers
All the ICL32XXE devices contain standard inverting receivers, but only the ICL3244E receivers can three-state, via the FORCEOFF control line. Additionally, the ICL3244E includes a noninverting (monitor) receiver (denoted by the ROUTB label) that is always active, regardless of the state of any control lines. Both receiver types convert RS-232 signals to CMOS output levels and accept inputs up to 25V while presenting the required 3k to 7k input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers' Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions.
VCC RXIN -25V VRIN +25V GND 5k RXOUT GND VROUT VCC
Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip 5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. Transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to 12V when disabled.
FIGURE 1. INVERTING RECEIVER CONNECTIONS
7
ICL3224E, ICL3226E, ICL3244E
The ICL3244E inverting receivers disable during forced (manual) powerdown, but not during automatic powerdown (see Table 2). Conversely, the monitor receiver remains active even during manual powerdown making it extremely useful for Ring Indicator monitoring. Standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral's protection diodes (see Figures 2 and 3). This renders them useless for wake up functions, but the corresponding monitor receiver can be dedicated to this task as shown in Figure 3.
TABLE 2. POWERDOWN LOGIC TRUTH TABLE RCVR OR XMTR EDGE WITHIN 30 SEC? RS-232 LEVEL PRESENT AT RECEIVER INPUT?
(NOTE 3) FORCEOFF FORCEON TRANSMITTER RECEIVER ROUTB INPUT INPUT OUTPUTS OUTPUTS OUTPUTS
INVALID OUTPUT
MODE OF OPERATION
ICL3224E, ICL3226E NO NO YES YES NO NO X X H H H H H H L L H H L L L L X X Active Active Active Active High-Z High-Z High-Z High-Z Active Active Active Active Active Active Active Active N.A. N.A. N.A. N.A. N.A. N.A. N.A. N.A. NO YES NO YES NO YES NO YES L H L H L H L H Normal Operation (Enhanced Auto Powerdown Disabled) Normal Operation (Enhanced Auto Powerdown Enabled) Powerdown Due to Enhanced Auto Powerdown Logic Manual Powerdown
ICL322XE - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN) X X ICL3244E NO NO YES YES NO NO X X H H H H H H L L H H L L L L X X Active Active Active Active High-Z High-Z High-Z High-Z Active Active Active Active Active Active High-Z High-Z Active Active Active Active Active Active Active Active NO YES NO YES NO YES NO YES L H L H L H L H Normal Operation (Enhanced Auto Powerdown Disabled) Normal Operation (Enhanced Auto Powerdown Enabled) Powerdown Due to Enhanced Auto Powerdown Logic Manual Powerdown NOTE 4 NOTE 4 NOTE 4 NOTE 4 Active High-Z Active Active N.A. N.A. YES NO H L Normal Operation Forced Auto Powerdown
ICL3244E - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN) X X NOTES: 3. Applies only to the ICL3244E. 4. Input is connected to INVALID Output. NOTE 4 NOTE 4 NOTE 4 NOTE 4 Active High-Z Active High-Z Active Active YES NO H L Normal Operation Forced Auto Powerdown
8
ICL3224E, ICL3226E, ICL3244E
VCC VCC CURRENT FLOW VOUT = VCC Rx POWERED DOWN UART Tx GND SHDN = GND OLD RS-232 CHIP
VCC
active and powerdown modes, under logic or software control, only the FORCEOFF input need be driven. The FORCEON state isn't critical, as FORCEOFF dominates over FORCEON. Nevertheless, if strictly manual control over powerdown is desired, the user must strap FORCEON high to disable the enhanced automatic powerdown circuitry. ICL3244E inverting (standard) receiver outputs also disable when the device is in powerdown, thereby eliminating the possible current path through a shutdown peripheral's input protection diode (see Figures 2 and 3). Connecting FORCEOFF and FORCEON together disables the enhanced automatic powerdown feature, enabling them to function as a manual SHUTDOWN input (see Figure 4).
FORCEOFF
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL
VCC
PWR MGT LOGIC
FORCEON
INVALID ICL32XXE
TRANSITION DETECTOR TO WAKE-UP LOGIC VCC RX POWERED DOWN TX UART R2OUTB VOUT = HI-Z R2OUT T1IN T1OUT FORCEOFF = GND R2IN ICL3244E I/O UART CPU
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
With any of the above control schemes, the time required to exit powerdown, and resume transmission is only 100s. When using both manual and enhanced automatic powerdown (FORCEON = 0), the ICL32XXE won't power up from manual powerdown until both FORCEOFF and FORCEON are driven high, or until a transition occurs on a receiver or transmitter input. Figure 5 illustrates a circuit for ensuring that the ICL32XXE powers up as soon as FORCEOFF switches high. The rising edge of the Master Powerdown signal forces the device to power up, and the ICL32XXE returns to enhanced automatic powerdown mode an RC time constant after this rising edge. The time constant isn't critical, because the ICL32XXE remains powered up for 30 seconds after the FORCEON falling edge, even if there are no signal transitions. This gives slow-to-wake systems (e.g., a mouse) plenty of time to start transmitting, and as long as it starts transmitting within 30 seconds both systems remain enabled.
Powerdown Functionality
This 3V family of RS-232 interface devices requires a nominal supply current of 0.3mA during normal operation (not in powerdown mode). This is considerably less than the 5mA to 11mA current required of 5V RS-232 devices. The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1A, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs three-state. Inverting receiver outputs may or may not disable in powerdown; refer to Table 2 for details. This micro-power mode makes these devices ideal for battery powered and portable applications.
Software Controlled (Manual) Powerdown
These devices allow the user to force the IC into the low power, standby state, and utilize a two pin approach where the FORCEON and FORCEOFF inputs determine the IC's mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. To switch between
9
ICL3224E, ICL3226E, ICL3244E
whenever it detects a transition on one of these inputs. This automatic powerdown feature provides additional system power savings without changes to the existing operating system. Enhanced automatic powerdown operates when the FORCEON input is low, and the FORCEOFF input is high. Tying FORCEON high disables automatic powerdown, but manual powerdown is always available via the overriding FORCEOFF input. Table 2 summarizes the enhanced automatic powerdown functionality. Figure 7 illustrates the enhanced powerdown control logic. Note that once the ICL32XXE enters powerdown (manually or automatically), the 30 second timer remains timed out (set), keeping the ICL32XXE powered down until FORCEON transitions high, or until a transition occurs on a receiver or transmitter input.
FORCEOFF T_IN EDGE DETECT S 30s TIMER EDGE DETECT R AUTOSHDN
POWER MANAGEMENT UNIT
MASTER POWERDOWN LINE 0.1F 1M
FORCEOFF
FORCEON
ICL32XXE
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP WHEN EXITING FORCED POWERDOWN
INVALID Output
The INVALID output always indicates (see Table 2) whether or not 30s have elapsed with invalid RS-232 signals (see Figures 6 and 8) persisting on all of the receiver inputs, giving the user an easy way to determine when the interface block should power down. Invalid receiver levels occur whenever the driving peripheral's outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. In the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the interface block. INVALID can also be used to indicate the DTR or RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to GND (as in the case of a powered down driver).
R_IN
FORCEON
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
VALID RS-232 LEVEL - INVALID = 1 2.7V INDETERMINATE
0.3V INVALID LEVEL - INVALID = 0 -0.3V INDETERMINATE
The INVALID output signal switches low to indicate that invalid levels have persisted on all of the receiver inputs for more than 30s (see Figure 8), but this has no direct effect on the state of the ICL32XXE (see the next sections for methods of utilizing INVALID to power down the device). INVALID switches high 1s after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. The time to recover from automatic powerdown mode is typically 100s.
-2.7V VALID RS-232 LEVEL - INVALID = 1
Emulating Standard Automatic Powerdown
If enhanced automatic powerdown isn't desired, the user can implement the standard automatic powerdown feature (mimics the function on the ICL3221E/23E/43E) by connecting the INVALID output to the FORCEON and FORCEOFF inputs, as shown in Figure 9. After 30s of invalid receiver levels, INVALID switches low and drives the ICL32XXE into a forced powerdown condition. INVALID switches high as soon as a receiver input senses a valid RS-232 level, forcing the ICL32XXE to power on. See the "INVALID DRIVING FORCEON AND FORCEOFF" section of Table 2 for an operational summary. This operational mode is perfect for handheld devices that communicate with
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Enhanced Automatic Powerdown
Even greater power savings is available by using these devices which feature an enhanced automatic powerdown function. When the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter nor receiver inputs for 30 seconds, the charge pump and transmitters powerdown, thereby reducing supply current to 1A. The ICL32XXE automatically powers back up
10
ICL3224E, ICL3226E, ICL3244E
RECEIVER INPUTS TRANSMITTER INPUTS TRANSMITTER OUTPUTS tINVH INVALID OUTPUT tINVL tAUTOPWDN READY OUTPUT V+ VCC 0 VtWU tAUTOPWDN tWU
} INVALID REGION
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, INVALID AND READY TIMING DIAGRAMS
another computer via a detachable cable. Detaching the cable allows the internal receiver pull-down resistors to pull the inputs to GND (an invalid RS-232 level), causing the 30s timer to time-out and drive the IC into powerdown. Reconnecting the cable restores valid levels, causing the IC to power back up.
ICL32XXE
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable cable, connecting INVALID to FORCEOFF (with FORCEON = 0) may be a desirable configuration. While the cable is attached INVALID and FORCEOFF remain high, so the enhanced automatic powerdown logic powers down the RS-232 device whenever there is 30 seconds of inactivity on the receiver and transmitter inputs. Detaching the cable allows the receiver inputs to drop to an invalid level (GND), so INVALID switches low and forces the RS-232 device to power down. The ICL32XXE remains powered down until the cable is reconnected (INVALID = FORCEOFF = 1) and a transition occurs on a receiver or transmitter input (see Figure 7). For immediate power up when the cable is reattached, connect FORCEON to FORCEOFF through a network similar to that shown in Figure 5.
I/O UART CPU
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT
Ready Output (ICL3224E and ICL3226E only)
The Ready output indicates that the ICL322XE is ready to transmit. Ready switches low whenever the device enters powerdown, and switches back high during power-up when V- reaches -4V or lower.
Capacitor Selection
The charge pumps require 0.1F capacitors for 3.3V operation. For other supply voltages refer to Table 3 for capacitor values. Do not use values smaller than those listed in Table 3. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without increasing C1's value, however, do not increase C1 without also increasing C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors). 11
FORCEON
FORCEOFF
INVALID
ICL3224E, ICL3226E, ICL3244E
When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor's equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-.
TABLE 3. REQUIRED CAPACITOR VALUES VCC (V) 3.0 to 3.6 4.5 to 5.5 3.0 to 5.5 C1 (F) 0.1 0.047 0.1 C2, C3, C4 (F) 0.1 0.33 0.47
Mouse Driveability
The ICL3244E is specifically designed to power a serial mouse while operating from low voltage supplies. Figure 11 shows the transmitter output voltages under increasing load current. The on-chip switching regulator ensures the transmitters will supply at least 5V during worst case conditions (15mA for paralleled V+ transmitters, 7.3mA for single V- transmitter).
6 TRANSMITTER OUTPUT VOLTAGE (V) 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 0 1 2 3 4 5 6 7 8 9 10 LOAD CURRENT PER TRANSMITTER (mA) VCC T2 ICL3244E T3 VOUT VOUT VCC = 3.0V T1 VOUT+ VOUT+
Power Supply Decoupling
In most circumstances a 0.1F bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC.
Operation Down to 2.7V
ICL32XXE transmitter outputs meet RS-562 levels (3.7V), at full data rate, with VCC as low as 2.7V. RS-562 levels typically ensure inter operability with RS-232 devices.
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD CURRENT (PER TRANSMITTER, i.e., DOUBLE CURRENT AXIS FOR TOTAL VOUT+ CURRENT)
Transmitter Outputs when Exiting Powerdown
Figure 10 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3k in parallel with 2500pF. Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V.
High Data Rates
The ICL32XXE maintain the RS-232 5V minimum transmitter output voltages even at high data rates. Figure 12 details a transmitter loopback test circuit, and Figure 13 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 14 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitters were also loaded with an RS-232 receiver.
VCC 0.1F T1 + C1+ C1ICL32XXE + C2 C2T2 TIN ROUT FORCEON VCC FORCEOFF TOUT RIN 5K 1000pF C2+ VC4 + VCC V+ + C3 +
5V/DIV.
FORCEOFF
VCC = +3.3V C1 - C4 = 0.1F 2V/DIV.
C1
5V/DIV.
READY TIME (20s/DIV.)
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT
12
ICL3224E, ICL3226E, ICL3244E
5V/DIV. T1IN
15kV ESD Protection
All pins on ICL32XX devices include ESD protection structures, but the ICL32XXE family incorporates advanced structures which allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events up to 15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don't interfere with RS-232 signals as large as 25V.
5s/DIV.
T1OUT
R1OUT VCC = +3.3V C1 - C4 = 0.1F
FIGURE 13. LOOPBACK TEST AT 120kbps
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5k current limiting resistor, making the test less severe than the IEC61000 test which utilizes a 330 limiting resistor. The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with respect to all other pins. The RS-232 pins on "E" family devices can withstand HBM ESD events to 15kV.
5V/DIV. T1IN
T1OUT
IEC61000-4-2 Testing
R1OUT VCC = +3.3V C1 - C4 = 0.1F 2s/DIV.
FIGURE 14. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
The ICL32XXE directly interfaces with 5V CMOS and TTL logic families. Nevertheless, with the ICL32XX at 3.3V, and the logic supply at 5V, AC, HC, and CD4000 outputs can drive ICL32XX inputs, but ICL32XX outputs do not reach the minimum VIH for these logic families. See Table 4 for more information.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES VCC SYSTEM POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE (V) (V) 3.3 5 5 3.3 5 3.3
The IEC 61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device's RS-232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-232 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The "E" device RS-232 pins withstand 15kV air-gap discharges. CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 8kV. All "E" family devices survive 8kV contact discharges on the RS-232 pins.
COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. ICL32XX outputs are incompatible with AC, HC, and CD4000 CMOS inputs.
13
ICL3224E, ICL3226E, ICL3244E Typical Performance Curves
6 TRANSMITTER OUTPUT VOLTAGE (V) VOUT+ 4 20 2 1 TRANSMITTER AT 250kbps OTHER TRANSMITTERS AT 30kbps 0 -2 -4 -6 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) SLEW RATE (V/s) -SLEW
VCC = 3.3V, TA = 25C
25
15 +SLEW 10
VOUT 5 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF)
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE
FIGURE 16. SLEW RATE vs LOAD CAPACITANCE
40 ICL3224E 35 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 250kbps 30 25 20 15 20kbps 10 5 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF)
35 ICL3226E 30 25 20 120kbps 15 10 20kbps 5 0 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) 250kbps
120kbps
FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
FIGURE 18. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
3.5
45 ICL3244E 40 SUPPLY CURRENT (mA) 35 30 120kbps 25 20 15 10 0 1000 2000 3000 4000 5000 20kbps SUPPLY CURRENT (mA) 250kbps
NO LOAD ALL OUTPUTS STATIC
3.0 2.5 2.0 1.5 1.0 0.5 0 2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LOAD CAPACITANCE (pF)
SUPPLY VOLTAGE (V)
FIGURE 19. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
FIGURE 20. SUPPLY CURRENT vs SUPPLY VOLTAGE
14
ICL3224E, ICL3226E, ICL3244E Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP) GND TRANSISTOR COUNT ICL3224E: 937 ICL3226E: 825 ICL3244E: 1109 PROCESS Si Gate CMOS
15
ICL3224E, ICL3226E, ICL3244E Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 0.25 0.010 L GAUGE PLANE H 0.25(0.010) M BM
M20.209 (JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D
-C-
MILLIMETERS MIN 1.73 0.05 1.68 0.25 0.09 7.07 5.20' MAX 1.99 0.21 1.78 0.38 0.20' 7.33 5.38 3 4 9 NOTES
MIN 0.068 0.002 0.066 0.010' 0.004 0.278 0.205
MAX 0.078 0.008' 0.070' 0.015 0.008 0.289 0.212
SEATING PLANE -AD A
A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.301 0.025 20 0 deg. 8 deg. 0.311 0.037
0.65 BSC 7.65 0.63 20 0 deg. 8 deg. Rev. 3 11/02 7.90' 0.95 6 7
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
16
ICL3224E, ICL3226E, ICL3244E Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M BM
M16.209 (JEDEC MO-150-AC ISSUE B)
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.233 0.197 MAX 0.078 0.072 0.014 0.009 0.255 0.220 MILLIMETERS MIN 0.05 1.65 0.22 0.09 5.90 5.00 MAX 2.00 1.85 0.38 0.25 6.50 5.60 NOTES 9 3 4 6 7 8o Rev. 2 3/95

A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.292 0.022 16 0o 8o 0.322 0.037
0.65 BSC 7.40 0.55 16 0o 8.20 0.95
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
17
ICL3224E, ICL3226E, ICL3244E Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M BM
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.390 0.197 MAX 0.078 0.072 0.014 0.009 0.413 0.220 MILLIMETERS MIN 0.05 1.65 0.22 0.09 9.90 5.00 MAX 2.00 1.85 0.38 0.25 10.50 5.60 NOTES 9 3 4 6 7 8o Rev. 1 3/95

A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.292 0.022 28 0o 8o 0.322 0.037
0.65 BSC 7.40 0.55 28 0o 8.20 0.95
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
18
ICL3224E, ICL3226E, ICL3244E Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M28.3 (JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1
L
MILLIMETERS MIN 2.35 0.10 0.33 0.23 17.70 7.40 MAX 2.65 0.30 0.51 0.32 18.10 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0926 0.0040 0.013 0.0091 0.6969 0.2914
MAX 0.1043 0.0118 0.0200 0.0125 0.7125 0.2992
B C D E
A1 0.10(0.004) C
e H h L N
0.05 BSC 0.394 0.01 0.016 28 0o 8o 0.419 0.029 0.050
1.27 BSC 10.00 0.25 0.40 28 0o 10.65 0.75 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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